[all-commits] [llvm/llvm-project] 5a1154: Reland D143267: [LoopVectorize] Use DataLayout::ge...

sdesmalen-arm via All-commits all-commits at lists.llvm.org
Thu Feb 9 01:43:15 PST 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5a115452c4545b6afd2731cec54c11015df4da85
      https://github.com/llvm/llvm-project/commit/5a115452c4545b6afd2731cec54c11015df4da85
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2023-02-09 (Thu, 09 Feb 2023)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
    M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
    M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll

  Log Message:
  -----------
  Reland D143267: [LoopVectorize] Use DataLayout::getIndexType instead of i32 for non-constant GEP indices.

Fixed issue where 'ConstantInt::get(IndextTy, -Part)' was executed with the wrong type for Part,
e.g. IndexTy was i64, but Part was 'unsigned', which led to things like 'mul i64 .., 4294967292',
which was obviously wrong.

Also changed sve-vector-reverse.ll to be vectorized with UF>1 to test this.

This reverts commit 1f01cdda68614dba12af3cc3aff38541d0abcc6b.




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