[all-commits] [llvm/llvm-project] d3188c: [X86] Add ISD::ABDS/ABDU vXi64 support on SSE41+ t...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d3188c7f14573d89a966b6194d927de2689e1d9a
      https://github.com/llvm/llvm-project/commit/d3188c7f14573d89a966b6194d927de2689e1d9a
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-02-08 (Wed, 08 Feb 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/abds-vector-128.ll
    M llvm/test/CodeGen/X86/abds-vector-256.ll
    M llvm/test/CodeGen/X86/abdu-vector-128.ll
    M llvm/test/CodeGen/X86/abdu-vector-256.ll
    M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
    M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll

  Log Message:
  -----------
  [X86] Add ISD::ABDS/ABDU vXi64 support on SSE41+ targets

If IMINMAX ops aren't legal, we can lower to the select(icmp(x,y),sub(x,y),sub(y,x)) pattern