[all-commits] [llvm/llvm-project] 394135: [mlir][vector] Support 0-D vector when eliding sin...
Kai Sasaki via All-commits
all-commits at lists.llvm.org
Tue Feb 7 19:12:10 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 3941355d8fee763e99c259ecd02f6fe567583296
https://github.com/llvm/llvm-project/commit/3941355d8fee763e99c259ecd02f6fe567583296
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2023-02-08 (Wed, 08 Feb 2023)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Support 0-D vector when eliding single element reduction
ElideSingleElementReduction causes assertion failure when we give 0-D vector. It's possible to fold the case by using vector.extractelement op instead. It's originally reported in https://github.com/llvm/llvm-project/issues/60193.
Reviewed By: dcaballe
Differential Revision: https://reviews.llvm.org/D143242
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