[all-commits] [llvm/llvm-project] 704596: [NVPTX] Lower extraction of upper half of i32/i64 ...
Artem Belevich via All-commits
all-commits at lists.llvm.org
Tue Feb 7 14:21:58 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 7045966982f29f2ee85dde282f76766262fe0c6e
https://github.com/llvm/llvm-project/commit/7045966982f29f2ee85dde282f76766262fe0c6e
Author: Artem Belevich <tra at google.com>
Date: 2023-02-07 (Tue, 07 Feb 2023)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/idioms.ll
Log Message:
-----------
[NVPTX] Lower extraction of upper half of i32/i64 as partial move.
This produces better SASS than right-shift + truncate and is fairly common for
CUDA code that operates on __half2 values represented as opaque integer.
Differential Revision: https://reviews.llvm.org/D143448
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