[all-commits] [llvm/llvm-project] 254e2a: [AArch64][GlobalISel] Widen G_ADD/G_MUL/G_OR/... e...

[Vladislav Dzhidzhoev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 254e2ad84407fce81f3b0c07e75f23671b8cb56a
      https://github.com/llvm/llvm-project/commit/254e2ad84407fce81f3b0c07e75f23671b8cb56a
  Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
  Date:   2023-02-06 (Mon, 06 Feb 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Widen G_ADD/G_MUL/G_OR/... element types if size < 8b

Widen element types of vector arguments of G_ADD, G_SUB, G_MUL, G_AND,
G_OR, G_XOR to the minumum supported size, in order to support vectors
of narrow types.

Differential Revision: https://reviews.llvm.org/D143100