[all-commits] [llvm/llvm-project] 0c64e1: [SelectionDAG] Add pcsections recursively on SDNod...
Martin Fink via All-commits
all-commits at lists.llvm.org
Thu Jan 26 07:15:40 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 0c64e1b68f36640ffe82fc90e6279c50617ad1cc
https://github.com/llvm/llvm-project/commit/0c64e1b68f36640ffe82fc90e6279c50617ad1cc
Author: Martin Fink <martin at finkmartin.com>
Date: 2023-01-26 (Thu, 26 Jan 2023)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/pcsections.ll
M llvm/test/CodeGen/X86/pcsections.ll
Log Message:
-----------
[SelectionDAG] Add pcsections recursively on SDNode values
When adding pcsections to SDNodes, recursively add them to all values of
the node as well.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D141048
Commit: 1142e6c7c795de7f80774325a07ed49bc95a48c9
https://github.com/llvm/llvm-project/commit/1142e6c7c795de7f80774325a07ed49bc95a48c9
Author: Martin Fink <martin at finkmartin.com>
Date: 2023-01-26 (Thu, 26 Jan 2023)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/AArch64/pcsections-memtransfer.ll
A llvm/test/CodeGen/X86/pcsections-memtransfer.ll
Log Message:
-----------
[SelectionDAG] Add missing setValue calls in visitIntrinsicCall
Add missing setValue calls in SelectionDAGBuilder for mem-transfer
intrinsic calls. These setValue calls are required in order to propagate
pcsections metadata from IR to MIR.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D141048
Compare: https://github.com/llvm/llvm-project/compare/719a728b86a1...1142e6c7c795
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