[all-commits] [llvm/llvm-project] 5f3dab: [AArch64][SME2] Add intrinsics to move multi-vecto...

[kmclaughlin-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5f3dab090bc7849ed6b91647d0e55174f1b7ad19
      https://github.com/llvm/llvm-project/commit/5f3dab090bc7849ed6b91647d0e55174f1b7ad19
  Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
  Date:   2023-01-25 (Wed, 25 Jan 2023)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sme2-intrinsics-extract-mova.ll
    A llvm/test/CodeGen/AArch64/sme2-intrinsics-insert-mova.ll

  Log Message:
  -----------
  [AArch64][SME2] Add intrinsics to move multi-vectors to/from ZA.

Adds intrinsics for the following:
 - mova: array to vector / vector to array
 - mova: tile to vector / vector to tile

Tablegen patterns have been added to match the ZA write intrinsics. As the
read intrinsics return a multi-vector, a function called SelectMultiVectorMove
has been added to AArch64ISelDAGToDAG to select the correct instruction. The
SelectSMETile function has also been added to check that the tile number
passed to read intrinsics is valid for the base register.

This patch also cleans up the sme_vector_to_tile_patterns multiclass to remove
the pattern for an offset of 0, which is handled by tileslice.

NOTE: These intrinsics are still in development and are subject to future changes.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D142031