[all-commits] [llvm/llvm-project] 03aed9: [AArch64][SME2] Add Multi-vector add/sub and accum...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 03aed959386a4dac4b5ce8c5d240096ce18aef33
      https://github.com/llvm/llvm-project/commit/03aed959386a4dac4b5ce8c5d240096ce18aef33
  Author: Caroline Concatto <caroline.concatto at arm.com>
  Date:   2023-01-25 (Wed, 25 Jan 2023)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-add.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-sub.ll

  Log Message:
  -----------
  [AArch64][SME2] Add Multi-vector add/sub and accumulate into ZA intrinsic

Add the following intrinsic:
    ADD
    SUB
    FADD
    FSUB
NOTE: These intrinsics are still in development and are subject to future changes.

Reviewed By: kmclaughlin

Differential Revision: https://reviews.llvm.org/D142210