[all-commits] [llvm/llvm-project] 0ccbf9: [RISCV] Remove Features from CPUInfo in RISCVTarge...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0ccbf911668786fbde7e1107c08c3eeef0f1eb4b
      https://github.com/llvm/llvm-project/commit/0ccbf911668786fbde7e1107c08c3eeef0f1eb4b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-01-20 (Fri, 20 Jan 2023)

  Changed paths:
    M llvm/include/llvm/TargetParser/RISCVTargetParser.h
    M llvm/lib/TargetParser/RISCVTargetParser.cpp
    M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp

  Log Message:
  -----------
  [RISCV] Remove Features from CPUInfo in RISCVTargetParser.

Instead of having separate feature bits, get information from march.
Invalid is now implied by empty march.
64-bit is now implied by march starting with "rv64".

Reviewed By: fpetrogalli

Differential Revision: https://reviews.llvm.org/D142230