[all-commits] [llvm/llvm-project] 9f8544: [DebugInfo] Store instr-ref mode of MachineFunctio...

[Jeremy Morse via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9f8544713ad8e57fb74cbfce3fbc7fff523e549f
      https://github.com/llvm/llvm-project/commit/9f8544713ad8e57fb74cbfce3fbc7fff523e549f
  Author: Jeremy Morse <jeremy.morse at sony.com>
  Date:   2023-01-20 (Fri, 20 Jan 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/FastISel.h
    M llvm/include/llvm/CodeGen/MIRYamlMapping.h
    M llvm/include/llvm/CodeGen/MachineFunction.h
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/include/llvm/CodeGen/SelectionDAGISel.h
    M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
    M llvm/lib/CodeGen/MIRPrinter.cpp
    M llvm/lib/CodeGen/MachineFunction.cpp
    M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
    M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
    M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h
    M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
    M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    M llvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir
    M llvm/test/DebugInfo/MIR/InstrRef/accept-nonlive-reg-phis.mir
    M llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir
    M llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
    M llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv2.mir
    M llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
    M llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
    M llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size.mir
    M llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir
    M llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
    M llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir
    M llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues-transfer-variadic-instr-ref.mir
    M llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir
    M llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir
    M llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir
    M llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir
    M llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir
    M llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
    M llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding.mir
    M llvm/test/DebugInfo/MIR/InstrRef/memory-operand-load-folding.mir
    M llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir
    M llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir
    M llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir
    M llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
    M llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
    M llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
    M llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir
    M llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced2.mir
    M llvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir
    M llvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir
    M llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir
    M llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir
    M llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir
    M llvm/test/DebugInfo/MIR/InstrRef/single-assign-propagation.mir
    M llvm/test/DebugInfo/MIR/InstrRef/spill-slot-limits.mir
    M llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
    M llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir
    M llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir
    M llvm/test/DebugInfo/MIR/InstrRef/twoaddr-to-threeaddr-sub.mir
    M llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
    M llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
    M llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir
    M llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir
    M llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir
    M llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
    M llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
    A llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param2.mir
    M llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
    M llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
    A llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs2.mir
    M llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir
    A llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer2.mir
    M llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
    M llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
    M llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
    M llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir
    M llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir
    M llvm/test/DebugInfo/X86/instr-ref-flag.ll
    M llvm/test/DebugInfo/X86/instr-ref-track-clobbers.mir

  Log Message:
  -----------
  [DebugInfo] Store instr-ref mode of MachineFunction in member

Add a flag state (and a MIR key) to MachineFunctions indicating whether they
contain instruction referencing debug-info or not. Whether DBG_VALUEs or
DBG_INSTR_REFs are used needs to be determined by LiveDebugValues at least, and
using the current optimisation level as a proxy is proving unreliable.

Test updates are purely adding the flag to tests, in a couple of cases it
involves separating out VarLocBasedLDV/InstrRefBasedLDV tests into separate
files, as they can no longer share the same input.

Differential Revision: https://reviews.llvm.org/D141387