[all-commits] [llvm/llvm-project] 928a17: [X86][WIP] Change precision control to FP80 during...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 928a1764d6bdf84073c9d85875f45c1716d6ff12
      https://github.com/llvm/llvm-project/commit/928a1764d6bdf84073c9d85875f45c1716d6ff12
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-01-20 (Fri, 20 Jan 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/lib/Target/X86/X86InstrFPStack.td
    M llvm/test/CodeGen/X86/uint64-to-float.ll

  Log Message:
  -----------
  [X86][WIP] Change precision control to FP80 during u64->fp32 conversion on Windows.

This is an alternative to D141074 to fix the problem by adjusting
the precision control dynamically.

This isn't quite complete yet. I want to support fadd with an load
folded into it too. That's the code we will usually generate.

Posting for early review so we can do some testing of this solution.

Differential Revision: https://reviews.llvm.org/D142178


  Commit: e62ffd3fd6bbda04d810f25c2f570e03bda1dd4a
      https://github.com/llvm/llvm-project/commit/e62ffd3fd6bbda04d810f25c2f570e03bda1dd4a
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-01-20 (Fri, 20 Jan 2023)

  Changed paths:
    M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp

  Log Message:
  -----------
  [RISCV][TableGen] Use getAllDerivedDefinitions in RISCVTargetDefEmitter to simplify the code. NFC


Compare: https://github.com/llvm/llvm-project/compare/790f23701225...e62ffd3fd6bb