[all-commits] [llvm/llvm-project] 1f08d3: [AMDGPU] Further reduce attaching of implicit oper...
Jeffrey Byrnes via All-commits
all-commits at lists.llvm.org
Thu Jan 19 14:31:59 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 1f08d3bc3a9a018534e52a47027dfb05cb4f55b3
https://github.com/llvm/llvm-project/commit/1f08d3bc3a9a018534e52a47027dfb05cb4f55b3
Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
Date: 2023-01-19 (Thu, 19 Jan 2023)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
M llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
M llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
M llvm/test/CodeGen/AMDGPU/spill192.mir
M llvm/test/CodeGen/AMDGPU/spill224.mir
M llvm/test/CodeGen/AMDGPU/spill288.mir
M llvm/test/CodeGen/AMDGPU/spill320.mir
M llvm/test/CodeGen/AMDGPU/spill352.mir
M llvm/test/CodeGen/AMDGPU/spill384.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
Log Message:
-----------
[AMDGPU] Further reduce attaching of implicit operands to spills
Extension of https://reviews.llvm.org/D141101 to even further reduce the amount of implicit operands we attach. The main benefit is to improve cability of post-ra scheduler, and reduce unneeded dependency resolution (e.g. inserting snops).
Unfortunately, we run into regressions if we completely minimize the amount implicit operands (naively), we run into some regressions (e.g. dual_movs are replaced with multiple calls to v_mov). This is even more reason to switch to LiveRegUnits.
Nonetheless, this patch removes the operands which we can for free (more or less).
Change-Id: Ib4f409202b36bdbc59eed615bc2d19fa8bd8c057
Differential Revision: https://reviews.llvm.org/D141557
Change-Id: I8b039e3c0d39436b384083f8beb947ee1b1730b2
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