[all-commits] [llvm/llvm-project] 871815: [AArch64][SVE2p1] Add SVE2.1 while (predicate-pair...

[david-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 871815e062a9e1d143f29333e6129f1cad0f83bb
      https://github.com/llvm/llvm-project/commit/871815e062a9e1d143f29333e6129f1cad0f83bb
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2023-01-19 (Thu, 19 Jan 2023)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    A llvm/test/CodeGen/AArch64/sve2p1-intrinsics-while-pp.ll

  Log Message:
  -----------
  [AArch64][SVE2p1] Add SVE2.1 while (predicate-pair) intrinsics

Adds intrinsics for the following instructions:

* WHILEGE (predicate pair)
* WHILEGT (predicate pair)
* WHILEHI (predicate pair)
* WHILEHS (predicate pair)
* WHILELE (predicate pair)
* WHILELO (predicate pair)
* WHILELS (predicate pair)
* WHILELT (predicate pair)

I've added an opcode selector called SelectOpcodeFromVT to
AArch64ISelDAGToDAG.cpp that we will extend in future to
select opcodes from different MVTs. For now, the only use is
for selecting predicate types.

NOTE: These intrinsics are still in development and are subject
to future changes.

Differential Revision: https://reviews.llvm.org/D141936