[all-commits] [llvm/llvm-project] 82fa51: [RISCV] Use TargetMachine MCSubtargetInfo in RISCV...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 82fa51f74dc71a541c5176ecf7f252713319c809
      https://github.com/llvm/llvm-project/commit/82fa51f74dc71a541c5176ecf7f252713319c809
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-01-18 (Wed, 18 Jan 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

  Log Message:
  -----------
  [RISCV] Use TargetMachine MCSubtargetInfo in RISCVAsmPrinter::EmitHwasanMemaccessSymbols.

The STI object in the class is updated each time runOnMachineFunction
is called. That means STI will be based on the last function processed.
If that function has different attributes than the rest of the module
that could theoretically result in odd behavior.

Use the copy in TargetMachine instead. That will use the global
CPU and mattrs.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D142041