[all-commits] [llvm/llvm-project] fd3300: [CodeGen] Prevent overlapping subregs in getCoveri...

[Pierre van Houtryve via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fd3300123de4fdc77cce94520d2cb58ea4c9122e
      https://github.com/llvm/llvm-project/commit/fd3300123de4fdc77cce94520d2cb58ea4c9122e
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2023-01-18 (Wed, 18 Jan 2023)

  Changed paths:
    M llvm/lib/CodeGen/TargetRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
    M llvm/test/CodeGen/AMDGPU/split-liverange-overlapping-copies.mir

  Log Message:
  -----------
  [CodeGen] Prevent overlapping subregs in getCoveringSubRegIndexes

If `getCoveringSubRegIndexes` returns a set of subregister indexes where some subregisters overlap others, it can create unsatisfiable copy bundles that eventually cause VirtRegRewriter to error out due to "cycles in copy bundle".

We can simply prevent this by making the algorithm skip over subregisters indexes that would cause an overlap with already-covered lanes.

Note that in the case of AMDGPU, this problem is caused by the lack of subregisters indexes for 13/14/15-register tuples. We have everything up until 12, then we have 16 and 32 but nothing between 12 and 16.
This means that the best candidate to do the least amount of copies when splitting a 29-register tuple was to copy (e.g.) 0-15 and 14-29, causing an overlap.
With this change, getCoveringSubRegIndexes will now prefer using something like 0-15, 16-28 and 1

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D141576