[all-commits] [llvm/llvm-project] 0b3863: [RISCV] Remove MCRegisterInfo dependency from comp...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0b38636f77df69b389adaae39365ad0e30164699
      https://github.com/llvm/llvm-project/commit/0b38636f77df69b389adaae39365ad0e30164699
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-01-17 (Tue, 17 Jan 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/test/TableGen/AsmPredicateCombiningRISCV.td
    M llvm/utils/TableGen/CompressInstEmitter.cpp

  Log Message:
  -----------
  [RISCV] Remove MCRegisterInfo dependency from compressInst/uncompresInst/isCompressibleInst.

This was being used to lookup the register class for a register number,
but those live in a tablegened array. We can index that array directly
just like RISCVAsmParser does.

Differential Revision: https://reviews.llvm.org/D141951