[all-commits] [llvm/llvm-project] f4f8f9: [Thumb2][MVE] Recognise shuffle truncation pattern...
Simon Pilgrim via All-commits
all-commits at lists.llvm.org
Mon Jan 16 10:00:02 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: f4f8f9f18590d6fdf531bb9d6981a6081a244d33
https://github.com/llvm/llvm-project/commit/f4f8f9f18590d6fdf531bb9d6981a6081a244d33
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2023-01-16 (Mon, 16 Jan 2023)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-float-loops.ll
M llvm/test/CodeGen/Thumb2/mve-shuffle.ll
M llvm/test/CodeGen/Thumb2/mve-vld2.ll
M llvm/test/CodeGen/Thumb2/mve-vld4.ll
M llvm/test/CodeGen/Thumb2/mve-vqdmulh-minmax.ll
M llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll
M llvm/test/CodeGen/Thumb2/mve-widen-narrow.ll
Log Message:
-----------
[Thumb2][MVE] Recognise shuffle truncation patterns suitable for ARMISD::MVETRUNC
I'm helping with the remaining regressions on D127115, and one of my candidate fixes caused some regressions with MVE interleaved shuffles due to poor handling of 'truncation' style shuffle masks (0,2,4,6,...).
This patch attempts to use the ARMISD::MVETRUNC node to handle these cases, based off existing code in LowerTruncate.
It handles both (0,2,4,6,...) and (1,3,5,7,....) 'top' style patterns (assuming no endian problems). I shift down the 'top' patterns - a basic search of ARM docs suggests MVE has some top/bottom truncation/narrowing instructions but I don't seem to be able to get them to be used.
Differential Revision: https://reviews.llvm.org/D141791
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