[all-commits] [llvm/llvm-project] 75345f: [NVPTX] Drop memory references of LDG/LDU

[Andrew Savonichev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 75345fb11638ff4c3f4c6c691dbb6c4f72e6666f
      https://github.com/llvm/llvm-project/commit/75345fb11638ff4c3f4c6c691dbb6c4f72e6666f
  Author: Andrew Savonichev <andrew.savonichev at gmail.com>
  Date:   2023-01-15 (Sun, 15 Jan 2023)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/test/CodeGen/NVPTX/bug26185-2.ll
    M llvm/test/CodeGen/NVPTX/bug26185.ll
    M llvm/test/CodeGen/NVPTX/ldg-invariant.ll
    M llvm/test/CodeGen/NVPTX/ldu-i8.ll
    M llvm/test/CodeGen/NVPTX/ldu-reg-plus-offset.ll
    M llvm/test/CodeGen/NVPTX/load-with-non-coherent-cache.ll
    M llvm/test/CodeGen/NVPTX/read-global-variable-constant.ll

  Log Message:
  -----------
  [NVPTX] Drop memory references of LDG/LDU

This patch fixes machine verifier errors:

    *** Bad machine code: Missing mayLoad flag ***
    - function:    foo1
    - basic block: %bb.0  (0x5560fc64ef08)
    - instruction: %4:float32regs =
	INT_PTX_LDG_GLOBAL_f32areg64 killed %3:int64regs
	:: (load (s32) from %ir.from1, addrspace 1)

mayLoad flag is missing because LDG and LDU instructions operate on
read-only memory, so we want to treat them as regular instructions and
exclude them from memory analysis.

Machine verifier checks for memoperands to determine whether an
instruction is a load, so dropping them during lowering fixes the
problem.

Differential Revision: https://reviews.llvm.org/D112466