[all-commits] [llvm/llvm-project] f60103: [Driver][RISCV] Adjust the priority between -mcpu, ...

[Kito Cheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f601039e8165cb2a49c783ccf4aafd1f7b326a63
      https://github.com/llvm/llvm-project/commit/f601039e8165cb2a49c783ccf4aafd1f7b326a63
  Author: Kito Cheng <kito.cheng at sifive.com>
  Date:   2023-01-13 (Fri, 13 Jan 2023)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
    M clang/test/Driver/riscv-cpus.c
    M clang/test/Driver/riscv-default-features.c
    A clang/test/Driver/riscv-march-mcpu-mtune.c
    M llvm/include/llvm/Support/RISCVISAInfo.h
    M llvm/lib/Support/RISCVISAInfo.cpp

  Log Message:
  -----------
  [Driver][RISCV] Adjust the priority between -mcpu, -mtune and -march

RISC-V supports `-march`, `-mtune`, and `-mcpu`: `-march` provides the
architecture extension information, `-mtune` provide the pipeline model, and
`-mcpu` provides both.

What's the priority among those options for now(w/o this patch)?

Pipeline model:
- Take from `-mtune` if present.
- Take from `-mcpu` if present
- Use the default pipeline model: `generic-rv32` or `generic-rv64`
Architecture extension has quite complicated behavior now:
- Take union from `-march` and `-mcpu` if both are present.
- Take from `-march` if present.
- Take from `-mcpu` if present.
- Implied from `-mabi` if present.
- Use the default architecture depending on the target triple

We treat `-mcpu`/`-mtune` and `-mcpu`/`-march` differently, and it's
kind of counterintuitive: -march is explicitly specified but ignored.

This patch adjusts the priority between `-mcpu`/`-march`, letting it use
architecture extension information from `-march` if it's present.

So the priority of architecture extension information becomes:
- Take from `-march` if present.
- Take from `-mcpu` if present.
- Implied from `-mabi` if present.
- Use the default architecture depending on the target triple

And this also match what we implement in RISC-V GCC too.

Reviewed By: craig.topper, MaskRay

Differential Revision: https://reviews.llvm.org/D140693