[all-commits] [llvm/llvm-project] d86f1a: [AArch64] Update 2 RME MEC instruction encodings

walkerkd via All-commits all-commits at lists.llvm.org
Fri Jan 13 07:20:48 PST 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d86f1a982e8423a2ae5a424906f6960576c35606
  Author: Keith Walker <keith.walker at arm.com>
  Date:   2023-01-13 (Fri, 13 Jan 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td
    M llvm/test/MC/AArch64/armv9a-mec.s
    M llvm/test/MC/Disassembler/AArch64/armv9a-mec.txt

  Log Message:
  [AArch64] Update 2 RME MEC instruction encodings

The encodings of these 2 RME MEC instructions are
incorrect and need swapping:


The correct encoding is:

Operation       op0     op1     CRn     CRm     op2
DC CIPAE, Xt    0b01    0b100   0b0111  0b1110  0b000
DC CIGDPAE, Xt  0b01    0b100   0b0111  0b1110  0b111

Differential Revision: https://reviews.llvm.org/D141689

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