[all-commits] [llvm/llvm-project] 0ef58c: [LLDB][RISCV] Add RVDC instruction support for Emu...

[Emmmer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0ef58c66c6e4652ff3582bf0972673708afb912e
      https://github.com/llvm/llvm-project/commit/0ef58c66c6e4652ff3582bf0972673708afb912e
  Author: Emmmer <yjhdandan at 163.com>
  Date:   2023-01-13 (Fri, 13 Jan 2023)

  Changed paths:
    M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
    M lldb/source/Plugins/Instruction/RISCV/RISCVCInstructions.h
    M lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp

  Log Message:
  -----------
  [LLDB][RISCV] Add RVDC instruction support for EmulateInstructionRISCV

RVC is the RISC-V standard compressed instruction-set extension, named "C", which reduces static and dynamic code size by adding short 16-bit instruction encodings for common operations, and RVCD is the compressed "D extension".

And "D extension" is a double-precision floating-point instruction-set extension, which adds double-precision floating-point computational instructions compliant with the IEEE 754-2008 arithmetic standard.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D140961