[all-commits] [llvm/llvm-project] 6c09a4: [RISCV][VP] expand vp intrinsics if no +zve32x fea...

[Yingchi Long via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6c09a4e5ba2e4197ec6acdb448cd405002ce08f5
      https://github.com/llvm/llvm-project/commit/6c09a4e5ba2e4197ec6acdb448cd405002ce08f5
  Author: Yingchi Long <i at lyc.dev>
  Date:   2023-01-13 (Fri, 13 Jan 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
    A llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll

  Log Message:
  -----------
  [RISCV][VP] expand vp intrinsics if no +zve32x feature

If the subtarget does not support VInstructions, expand vp intrinscs to scalar instructions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D139706