[all-commits] [llvm/llvm-project] cf7a83: [TargetParser] Generate the defs for RISCV CPUs us...

[Francesco Petrogalli via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cf7a8305a2b4ddfd299c748136cb9a2960ef7089
      https://github.com/llvm/llvm-project/commit/cf7a8305a2b4ddfd299c748136cb9a2960ef7089
  Author: Francesco Petrogalli <francesco.petrogalli at apple.com>
  Date:   2023-01-11 (Wed, 11 Jan 2023)

  Changed paths:
    M clang/lib/Basic/Targets/RISCV.cpp
    M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
    M llvm/include/llvm/CMakeLists.txt
    A llvm/include/llvm/TargetParser/CMakeLists.txt
    R llvm/include/llvm/TargetParser/RISCVTargetParser.def
    A llvm/include/llvm/TargetParser/RISCVTargetParser.h
    M llvm/include/llvm/TargetParser/TargetParser.h
    M llvm/include/llvm/module.extern.modulemap
    M llvm/include/llvm/module.install.modulemap
    M llvm/include/llvm/module.modulemap
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/TargetParser/CMakeLists.txt
    A llvm/lib/TargetParser/RISCVTargetParser.cpp
    M llvm/lib/TargetParser/TargetParser.cpp
    M llvm/utils/TableGen/CMakeLists.txt
    A llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
    M llvm/utils/TableGen/TableGen.cpp
    M llvm/utils/TableGen/TableGenBackends.h

  Log Message:
  -----------
  [TargetParser] Generate the defs for RISCV CPUs using llvm-tblgen.

This patch removes the file `llvm/include/llvm/TargetParser/RISCVTargetParser.def` and replaces it with a tablegen-generated `.inc` file out of `llvm/lib/Target/RISCV/RISCV.td`.

The module system has been updated to make sure we can build clang/llvm with `-DLLVM_ENABLE_MODULES=On`

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D137517