[all-commits] [llvm/llvm-project] c4ce1e: [RISCV] Avoid emitting hardware fences for singlet...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c4ce1e0131aa04cec4803740c3c203c7f000e837
      https://github.com/llvm/llvm-project/commit/c4ce1e0131aa04cec4803740c3c203c7f000e837
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2023-01-10 (Tue, 10 Jan 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/test/CodeGen/RISCV/atomic-fence.ll

  Log Message:
  -----------
  [RISCV] Avoid emitting hardware fences for singlethread fences

singlethread fences only synchronize with code running on the same hardware thread (i.e. signal handlers). Because of this, we need to prevent instruction reordering, but do not need to emit hardware fence instructions.

The implementation strategy here matches many other backends. The main motivation of this patch is to introduce the MEMBARRIER node and get some test coverage for it.

Differential Revision: https://reviews.llvm.org/D141311