[all-commits] [llvm/llvm-project] b1b475: [LSR] Hoist IVInc to loop header if its all uses a...

[chenglin.bi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b1b4758e7f4b2ffe1faa28b00eb037832e5d26a7
      https://github.com/llvm/llvm-project/commit/b1b4758e7f4b2ffe1faa28b00eb037832e5d26a7
  Author: chenglin.bi <chenglin.bi at linaro.org>
  Date:   2023-01-10 (Tue, 10 Jan 2023)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
    M llvm/test/Transforms/LoopStrengthReduce/AArch64/pr53625.ll

  Log Message:
  -----------
  [LSR] Hoist IVInc to loop header if its all uses are in the loop header

When the latch block is different from header block, IVInc will be expanded in the latch loop. We can't generate the post index load/store this case.
But if the IVInc only used in the loop, actually we still can use the post index load/store because when exit loop we don't care the last IVInc value.
So, trying to hoist IVInc to help backend to generate more post index load/store.

Fix #53625

Reviewed By: eopXD

Differential Revision: https://reviews.llvm.org/D138636