[all-commits] [llvm/llvm-project] 07d6af: [AArch64] Fold And/Or into CSel if possible

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 07d6af6a71001c3d3a7aae21085646e642fbb56c
      https://github.com/llvm/llvm-project/commit/07d6af6a71001c3d3a7aae21085646e642fbb56c
  Author: David Green <david.green at arm.com>
  Date:   2023-01-09 (Mon, 09 Jan 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
    M llvm/test/CodeGen/AArch64/bcmp.ll
    M llvm/test/CodeGen/AArch64/csel-andor-onebit.ll
    M llvm/test/CodeGen/AArch64/i128-math.ll
    M llvm/test/CodeGen/AArch64/mul-cmp.ll
    M llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
    M llvm/test/CodeGen/AArch64/vec_umulo.ll

  Log Message:
  -----------
  [AArch64] Fold And/Or into CSel if possible

If we have `and x, (csel 0, 1, cc)` and we know that x is 0/1, then we
can emit a `csel ZR, x, cc`. Similarly for `or x, (csel 0, 1, cc)` we
can emit `csinc x, ZR, cc`. This can help where we can not otherwise
general ccmp instructions.

Differential Revision: https://reviews.llvm.org/D141119