[all-commits] [llvm/llvm-project] c9602e: [SVE] Fix incorrect VT usage when lowering fixed l...
paulwalker-arm via All-commits
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Sun Jan 8 05:10:53 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: c9602e02fc16e8a3fcb6f7b58d8615b04a8fde38
https://github.com/llvm/llvm-project/commit/c9602e02fc16e8a3fcb6f7b58d8615b04a8fde38
Author: Paul Walker <paul.walker at arm.com>
Date: 2023-01-08 (Sun, 08 Jan 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-sdiv-pow2.ll
Log Message:
-----------
[SVE] Fix incorrect VT usage when lowering fixed length vector divides.
Ensure the negation required when lowering negative power-of-two
divides uses the scalable vector container type with the fixed
length result extracted from it.
Fixes: #59647
Differential Revision: https://reviews.llvm.org/D140563
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