[all-commits] [llvm/llvm-project] 455466: Recommit "[RISCV] Enable the LocalStackSlotAllocat...

LiDongjin via All-commits all-commits at lists.llvm.org
Fri Jan 6 09:54:37 PST 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4554663bc0da71d61ab488641c95ef98430cb451
      https://github.com/llvm/llvm-project/commit/4554663bc0da71d61ab488641c95ef98430cb451
  Author: LiDongjin <jin.mse.sse at gmail.com>
  Date:   2023-01-06 (Fri, 06 Jan 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.h
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
    M llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll

  Log Message:
  -----------
  Recommit "[RISCV] Enable the LocalStackSlotAllocation pass support"

This includes a fix for the tramp3d failure from the llvm-testsuite
that caused the last revert. Hopefully the others failures were the
same issue.

Original commit message:
For RISC-V, load/store(exclude vector load/store) instructions only has a 12 bit immediate operand. If the offset is out-of-range, it must make use of a temp register to make up this offset. If between these offsets, they have a small(IsInt<12>) relative offset, LocalStackSlotAllocation pass can find a value as frame base register's value, and replace the origin offset with this register's value plus the relative offset.

Co-authored-by: luxufan <luxufan at iscas.ac.cn>
Co-authored-by: Craig Topper <craig.topper at sifive.com>

Differential Revision: https://reviews.llvm.org/D98101




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