[all-commits] [llvm/llvm-project] b599a3: [WebAssembly][NFC] Add test case for PR59626

Luke Lau via All-commits all-commits at lists.llvm.org
Fri Jan 6 07:44:06 PST 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b599a30e931ee0a35c619ff6d8c0165909286a52
      https://github.com/llvm/llvm-project/commit/b599a30e931ee0a35c619ff6d8c0165909286a52
  Author: Luke Lau <luke at igalia.com>
  Date:   2023-01-06 (Fri, 06 Jan 2023)

  Changed paths:
    A llvm/test/CodeGen/WebAssembly/pr59626.ll

  Log Message:
  -----------
  [WebAssembly][NFC] Add test case for PR59626

For D141079

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D141120


  Commit: 275658d1af11a2fbbbbad3d70629afc75b9e107c
      https://github.com/llvm/llvm-project/commit/275658d1af11a2fbbbbad3d70629afc75b9e107c
  Author: Luke Lau <luke at igalia.com>
  Date:   2023-01-06 (Fri, 06 Jan 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/AArch64/active_lane_mask.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-select.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-select.ll
    M llvm/test/CodeGen/AArch64/sve-umulo-sdnode.ll
    M llvm/test/CodeGen/WebAssembly/pr59626.ll

  Log Message:
  -----------
  [SelectionDAG] Implicitly truncate known bits in SPLAT_VECTOR

Now that D139525 fixes the Hexagon infinite loop, the stopgap can be
removed to provide more information about known bits in SPLAT_VECTOR
whose operands are smaller than the bit width (which is most of the
time)

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D141075


Compare: https://github.com/llvm/llvm-project/compare/16c1c9fdcc48...275658d1af11


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