[all-commits] [llvm/llvm-project] 5a57eb: [VP][RISCV] Add vp.abs and RISC-V support.

[Yeting Kuo via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5a57ebcc4326cc76d6d0f76d8d03d3e53208de21
      https://github.com/llvm/llvm-project/commit/5a57ebcc4326cc76d6d0f76d8d03d3e53208de21
  Author: Yeting Kuo <yeting.kuo at sifive.com>
  Date:   2023-01-06 (Fri, 06 Jan 2023)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs-vp.ll
    M llvm/unittests/IR/VPIntrinsicTest.cpp

  Log Message:
  -----------
  [VP][RISCV] Add vp.abs and RISC-V support.

RISC-V uses ISD::ABS lower method (abs x) -> (smax_vl x (sub_vl 0, x)) for ISD::VP_ABS.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141033