[all-commits] [llvm/llvm-project] 068033: [NFC][X86] Make vec_anyext.ll test non-useless

[Roman Lebedev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 068033a2f7f8dcb97431634d2c7aa0f32cb5692f
      https://github.com/llvm/llvm-project/commit/068033a2f7f8dcb97431634d2c7aa0f32cb5692f
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2023-01-05 (Thu, 05 Jan 2023)

  Changed paths:
    M llvm/test/CodeGen/X86/vec_anyext.ll

  Log Message:
  -----------
  [NFC][X86] Make vec_anyext.ll test non-useless


  Commit: dbce1110f189ab344c0d9a2a04bcab3bf6055e52
      https://github.com/llvm/llvm-project/commit/dbce1110f189ab344c0d9a2a04bcab3bf6055e52
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2023-01-05 (Thu, 05 Jan 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [NFC][DAG] Move `getOpcode_EXTEND*()` helpers from X86 into SelectionDAG

To be used in an upcoming patch.


  Commit: 2b1d077592a680d1ac16ef4315d2293a58cf7445
      https://github.com/llvm/llvm-project/commit/2b1d077592a680d1ac16ef4315d2293a58cf7445
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2023-01-05 (Thu, 05 Jan 2023)

  Changed paths:
    A llvm/test/CodeGen/AArch64/extend_inreg_of_concat_subvectors.ll

  Log Message:
  -----------
  [NFC][AArch64] Add some tests for upcoming patch


  Commit: 317a1adfe4927c06eee606a81ac9b01fd6d6df93
      https://github.com/llvm/llvm-project/commit/317a1adfe4927c06eee606a81ac9b01fd6d6df93
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2023-01-05 (Thu, 05 Jan 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/extend_inreg_of_concat_subvectors.ll
    M llvm/test/CodeGen/AArch64/zext-to-tbl.ll

  Log Message:
  -----------
  [DAGCombiner] Fold *_EXTEND_INREG of one of CONCAT_VECTORS operands into *_EXTEND of operand

This appears to be the root problematic pattern
for AArch64 regression in D140677.

We already do this, and many more, as target-specific X86 combines,
so this isn't causing much of an impact.


  Commit: 41005b7ab2ece511a441d489e9130b82f4fab4cd
      https://github.com/llvm/llvm-project/commit/41005b7ab2ece511a441d489e9130b82f4fab4cd
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2023-01-05 (Thu, 05 Jan 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/extend_inreg_of_concat_subvectors.ll

  Log Message:
  -----------
  [DAGCombiner] Do try to combine `ISD::ANY_EXTEND_VECTOR_INREG` nodes

These weren't previously getting combined at all here,
only in target-specific combines.


Compare: https://github.com/llvm/llvm-project/compare/11030c7d67a7...41005b7ab2ec