[all-commits] [llvm/llvm-project] 3612d9: [GISel] Rework trunc/shl combine in a generic trun...
Pierre van Houtryve via All-commits
all-commits at lists.llvm.org
Fri Dec 9 01:46:58 PST 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 3612d9eaacd0571692f6ed80bd67403bc1ca541e
https://github.com/llvm/llvm-project/commit/3612d9eaacd0571692f6ed80bd67403bc1ca541e
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2022-12-09 (Fri, 09 Dec 2022)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shift.mir
R llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shl.mir
Log Message:
-----------
[GISel] Rework trunc/shl combine in a generic trunc/shift combine
This combine only handled left shifts, but now it can handle right shifts as well. It handles right shifts conservatively and only truncates them to the size returned by TLI.
AMDGPU benefits from always lowering shifts to 32 bits for instance, but AArch64 would rather keep them at 64 bits.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D136319
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