[all-commits] [llvm/llvm-project] bcc447: [compiler-rt][hwasan] Let CheckAddressSized eventu...

[PiJoules via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bcc4470bade15dbafa879973828a03c7e5194399
      https://github.com/llvm/llvm-project/commit/bcc4470bade15dbafa879973828a03c7e5194399
  Author: Leonard Chan <leonardchan at google.com>
  Date:   2022-12-07 (Wed, 07 Dec 2022)

  Changed paths:
    M compiler-rt/lib/hwasan/hwasan_checks.h
    A compiler-rt/lib/hwasan/hwasan_registers.h

  Log Message:
  -----------
  [compiler-rt][hwasan] Let CheckAddressSized eventually call HandleTagMismatch on Fuchsia

Any hwasan tag checking done through runtime calls like __hwasan_mem* or
__hwasan_load/store* currently raise a sigtrap on a tag mismatch. Hwasan
dumps as much information it knows on the tag mismatch by placing
important values in specific registers before the brk and encoding the
access information in the optional argument supplied to the brk. If the
platform hwasan runs on uses signal handlers, then users can see the
typical pretty hwasan error report, but Fuchsia doesn't use signal
handlers, so it's left up to the platform exception handler to print all
this encoded information.

This patch attempts to enter the regular error reporting path via
HandleTagMismatch if a new macro CAN_GET_REGISTERS is set. For now this
is only defined for Fuchsia + aarch64, but can be expanded for other
platforms.

Differential Revision: https://reviews.llvm.org/D139377