[all-commits] [llvm/llvm-project] f8ed70: [MachineCombiner] Extend reassociation logic to ha...

[Anton Sidorenko via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f8ed7093452aabd71650a3bb5dbca942815f9563
      https://github.com/llvm/llvm-project/commit/f8ed7093452aabd71650a3bb5dbca942815f9563
  Author: Anton Sidorenko <anton.sidorenko at syntacore.com>
  Date:   2022-12-07 (Wed, 07 Dec 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/lib/CodeGen/TargetInstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.h
    M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
    M llvm/lib/Target/PowerPC/PPCInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/lib/Target/X86/X86InstrInfo.h
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
    M llvm/test/CodeGen/AArch64/arm64-rev.ll
    M llvm/test/CodeGen/AArch64/machine-combiner.ll
    M llvm/test/CodeGen/AArch64/sqrt-fastmath.ll
    M llvm/test/CodeGen/PowerPC/machine-combiner.ll
    M llvm/test/CodeGen/RISCV/machine-combiner.ll
    M llvm/test/CodeGen/X86/avx512-mask-op.ll
    M llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
    M llvm/test/CodeGen/X86/avx512fp16-machine-combiner.ll
    M llvm/test/CodeGen/X86/avx512fp16-mscatter.ll
    M llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
    M llvm/test/CodeGen/X86/horizontal-sum.ll
    M llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
    M llvm/test/CodeGen/X86/machine-combiner.ll
    M llvm/test/CodeGen/X86/madd.ll
    M llvm/test/CodeGen/X86/masked_gather_scatter.ll
    M llvm/test/CodeGen/X86/mul-constant-i64.ll
    M llvm/test/CodeGen/X86/pr46877.ll
    M llvm/test/CodeGen/X86/sqrt-fastmath.ll
    M llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
    M llvm/test/CodeGen/X86/x86-interleaved-access.ll

  Log Message:
  -----------
  [MachineCombiner] Extend reassociation logic to handle inverse instructions

Machine combiner supports generic reassociation only of associative and
commutative instructions, for example (A + X) + Y => (X + Y) + A. However, we
can extend this generic support to handle patterns like
(X + A) - Y => (X - Y) + A), where `-` is the inverse of `+`.
This patch adds interface functions to process reassociation patterns of
associative/commutative instructions and their inverse variants with minimal
changes in backends.

Differential Revision: https://reviews.llvm.org/D136754