[all-commits] [llvm/llvm-project] 5cd900: [AArch64] Transform shift+and to shift+shift to se...

[chenglin.bi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5cd900ce3c6edd9e0d9b163c9d6cf7f38688d2ee
      https://github.com/llvm/llvm-project/commit/5cd900ce3c6edd9e0d9b163c9d6cf7f38688d2ee
  Author: chenglin.bi <chenglin.bi at linaro.org>
  Date:   2022-12-06 (Tue, 06 Dec 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/test/CodeGen/AArch64/shiftregister-from-and.ll

  Log Message:
  -----------
  [AArch64] Transform shift+and to shift+shift to select more shifted register

and (shl/srl/sra, x, c), mask --> shl (srl/sra, x, c1), c2

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D138904