[all-commits] [llvm/llvm-project] eaea46: [AArch64] lower abs intrinsic to new ABS instructi...

[Ties Stuij via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: eaea4608e645e36962541f8fe03a8afc1139ed2a
      https://github.com/llvm/llvm-project/commit/eaea4608e645e36962541f8fe03a8afc1139ed2a
  Author: Ties Stuij <ties.stuij at arm.com>
  Date:   2022-12-06 (Tue, 06 Dec 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/iabs.ll

  Log Message:
  -----------
  [AArch64] lower abs intrinsic to new ABS instruction in SelDag

When feature CSSC is available, the SelectionDag abs intrinsic should map to the
new scalar ABS instruction.

Additionally, the SIMDTwoScalarD tablegen defm includes a pattern match for
scalar i64, which we don't want to use when CSSC is enabled.

spec:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/ABS--Absolute-value-

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D138812