[all-commits] [llvm/llvm-project] 2f778e: [AArch64] SelectionDag codegen for gpr CTZ instruc...

[Ties Stuij via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2f778e60c9bf6bf446ff339e2a9393dac21a7095
      https://github.com/llvm/llvm-project/commit/2f778e60c9bf6bf446ff339e2a9393dac21a7095
  Author: Ties Stuij <ties.stuij at arm.com>
  Date:   2022-12-06 (Tue, 06 Dec 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    A llvm/test/CodeGen/AArch64/gpr_cttz.ll

  Log Message:
  -----------
  [AArch64] SelectionDag codegen for gpr CTZ instruction

When feature CSSC is available we should use instruction CTZ in SelectionDag
where applicable:

- CTTZ intrinsics are lowered to using the gpr CTZ instruction
- BITREVERSE -> CTLZ instruction pattern gets replaced by CTZ

spec:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/CTZ--Count-Trailing-Zeros-

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D138811