[all-commits] [llvm/llvm-project] 081b7f: [AAch64] Optimize muls with operands having enough...

[bipmis via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 081b7f6b031310b61c2fc952d9508bccb38162dd
      https://github.com/llvm/llvm-project/commit/081b7f6b031310b61c2fc952d9508bccb38162dd
  Author: bipmis <biplob.mishra at arm.com>
  Date:   2022-12-05 (Mon, 05 Dec 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll
    M llvm/test/CodeGen/AArch64/aarch64-smull.ll

  Log Message:
  -----------
  [AAch64] Optimize muls with operands having enough sign bits.

Muls with 64bit operands where each of the operand is having more than 32 sign bits, we can generate a single smull instruction on a 32bit operand.

Differential Revision: https://reviews.llvm.org/D138817