[all-commits] [llvm/llvm-project] a21bbc: [MachineCombiner][RISCV] Make hasReassociableSibli...

[Anton Sidorenko via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a21bbc24d306892136240f31e68c607775a6d7a3
      https://github.com/llvm/llvm-project/commit/a21bbc24d306892136240f31e68c607775a6d7a3
  Author: Anton Sidorenko <anton.sidorenko at syntacore.com>
  Date:   2022-12-01 (Thu, 01 Dec 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h

  Log Message:
  -----------
  [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV

To check reassociation correctness for RISCV, we must ensure that the root and
it's sibling have equal rounding modes (for floating point instructions).
`hasReassociableSibling` is a good place to make additional target-dependend
checks.

This patch allows us to enable default machine combiner mechanism to gather
reassociation candidates on RISCV.

Differential Revision: https://reviews.llvm.org/D138302