[all-commits] [llvm/llvm-project] 073d5e: [Hexagon] Further improve code generation for shuf...

[Krzysztof Parzyszek via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 073d5e5945c428e20db0884943e6dcb7ff2158df
      https://github.com/llvm/llvm-project/commit/073d5e5945c428e20db0884943e6dcb7ff2158df
  Author: Krzysztof Parzyszek <kparzysz at quicinc.com>
  Date:   2022-11-29 (Tue, 29 Nov 2022)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
    M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h
    M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
    M llvm/lib/Target/Hexagon/HexagonISelLowering.h
    M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
    M llvm/test/CodeGen/Hexagon/autohvx/int-to-fp.ll
    M llvm/test/CodeGen/Hexagon/autohvx/mulh.ll
    M llvm/test/CodeGen/Hexagon/autohvx/qmul.ll
    M llvm/test/CodeGen/Hexagon/autohvx/shuffle-half-128b.ll
    M llvm/test/CodeGen/Hexagon/autohvx/shuffle-half-64b.ll

  Log Message:
  -----------
  [Hexagon] Further improve code generation for shuffles

* Concatenate partial shuffles into longer ones whenever possible:
In selection DAG, shuffle's operands and return type must all agree. This
is not the case in LLVM IR, and non-conforming IR-level shuffles will be
rewritten to match DAG's requirements. This can also make a shuffle that
can be matched to a single HVX instruction become shuffles that require
more complex handling. Example: anything that takes two single vectors
and returns a pair (e.g. V6_vshuffvdd).
This is avoided by concatenating such shuffles into ones that take a vector
pair, and an undef pair, and produce a vector pair.

* Recognize perfect shuffles when masks contain `undef` values.

* Use funnel shifts for contracting shuffles.

* Recognize rotations as a separate step.

These changes go into a single commit, because each one on their own
introduced some regressions.