[all-commits] [llvm/llvm-project] 17e51c: [AArch64][SME]: Add precursory tests for D138682

[hassnaaHamdi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 17e51cd4f94cea6798f37ca31863b5a61e278746
      https://github.com/llvm/llvm-project/commit/17e51cd4f94cea6798f37ca31863b5a61e278746
  Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
  Date:   2022-11-29 (Tue, 29 Nov 2022)

  Changed paths:
    A llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bit-counting.ll
    A llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitselect.ll

  Log Message:
  -----------
  [AArch64][SME]: Add precursory tests for D138682

Add testing files:
 - bit-counting.ll
 - bitselect.ll


  Commit: 9c7286f938ea05be75f0a9287a8d7a77734e22e7
      https://github.com/llvm/llvm-project/commit/9c7286f938ea05be75f0a9287a8d7a77734e22e7
  Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
  Date:   2022-11-29 (Tue, 29 Nov 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bit-counting.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bitselect.ll

  Log Message:
  -----------
  [AArch64][SME]: Generate streaming-compatible code for bit counting/select

To generate code compatible to streaming mode:
 - enable custom-lowering ISD::CTLZ and ISD::CTPOP.
 - disable combining OR into BSL.

- Testing files:
 - bit-counting.ll
 - bitselect.ll

Reviewed By: david-arm, sdesmalen

Differential Revision: https://reviews.llvm.org/D138682


Compare: https://github.com/llvm/llvm-project/compare/3c10e9c77332...9c7286f938ea