[all-commits] [llvm/llvm-project] 0dbc52: Add MC support of RISCV Zcd Extension

[VincentWu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0dbc52a0ab3c2b32f729e985d62401ce9bd9853e
      https://github.com/llvm/llvm-project/commit/0dbc52a0ab3c2b32f729e985d62401ce9bd9853e
  Author: WuXinlong <821408745 at qq.com>
  Date:   2022-11-24 (Thu, 24 Nov 2022)

  Changed paths:
    M clang/test/Preprocessor/riscv-target-features.c
    M llvm/lib/Support/RISCVISAInfo.cpp
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/test/MC/RISCV/compress-rv32d.s
    M llvm/test/MC/RISCV/rv32dc-valid.s
    M llvm/test/MC/RISCV/rv64dc-valid.s

  Log Message:
  -----------
  Add MC support of RISCV Zcd Extension

This patch add the instructions of Zcd extension.

Zcd is a subset of C Ext which include the double-precision floating-point instructions (c.fld, c.fldsp, c.fsd, c.fsdsp).

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D134177