[all-commits] [llvm/llvm-project] 99b384: [mlir][sparse] introduce vectorization pass for sp...

[Aart Bik via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 99b3849d89cfdbc60ce4e18fc9c70dfd377bd93b
      https://github.com/llvm/llvm-project/commit/99b3849d89cfdbc60ce4e18fc9c70dfd377bd93b
  Author: Aart Bik <ajcbik at google.com>
  Date:   2022-11-21 (Mon, 21 Nov 2022)

  Changed paths:
    M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
    M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
    M mlir/lib/Dialect/SparseTensor/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
    A mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
    M mlir/test/Dialect/SparseTensor/sparse_vector.mlir
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [mlir][sparse] introduce vectorization pass for sparse loops

This brings back previous SIMD functionality, but in a separate pass.
The idea is to improve this new pass incrementally, going beyond for-loops
to while-loops for co-iteration as welll (masking), while introducing new
abstractions to make the lowering more progressive. The separation of
sparsification and vectorization is a very good first step on this journey.

Also brings back ArmSVE support

Still to be fine-tuned:
  + use of "index" in SIMD loop (viz. a[i] = i)
  + check that all ops really have SIMD support
  + check all forms of reductions
  + chain reduction SIMD values

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D138236