[all-commits] [llvm/llvm-project] be4a1d: [PowerPC] Extend GlobalISel implementation to emit...

[Kai Nacke via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: be4a1dfbf93dcb837e06bb619b934ed8cf9fd224
      https://github.com/llvm/llvm-project/commit/be4a1dfbf93dcb837e06bb619b934ed8cf9fd224
  Author: Kai Nacke <kai.peter.nacke at ibm.com>
  Date:   2022-11-21 (Mon, 21 Nov 2022)

  Changed paths:
    M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
    A llvm/lib/Target/PowerPC/GISel/PPCGenRegisterBankInfo.def
    M llvm/lib/Target/PowerPC/GISel/PPCInstructionSelector.cpp
    M llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
    M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
    M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.h
    M llvm/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
    A llvm/test/CodeGen/PowerPC/GlobalISel/ppc-isel-logical.ll

  Log Message:
  -----------
  [PowerPC] Extend GlobalISel implementation to emit and/or/xor.

Adds some more code to GlobalISel to enable instruction selection for and/or/xor.

- Makes G_IMPLICIT_DEF, G_CONSTANT, G_AND, G_OR, G_XOR legal for 64bit register size.
- Implement lowerReturn in CallLowering
- Provides mapping of the operands to register banks.
- Adds register info to G_COPY operands.

The utility functions are all only implemented so far to support this use case.
Especially the functions in PPCGenRegisterBankInfo.def are too simple for
general use.

Reviewed By: nemanjai, shchenz, amyk

Differential Revision: https://reviews.llvm.org/D127530