[all-commits] [llvm/llvm-project] 746cf4: [X86] Synchronise scheduler classes of VPERM2F128/...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 746cf4f13feaff97805e1daf8d600fa7287b3568
      https://github.com/llvm/llvm-project/commit/746cf4f13feaff97805e1daf8d600fa7287b3568
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-11-21 (Mon, 21 Nov 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ScheduleZnver1.td
    M llvm/lib/Target/X86/X86ScheduleZnver2.td
    M llvm/test/tools/llvm-mca/X86/Znver1/resources-avx2.s
    M llvm/test/tools/llvm-mca/X86/Znver2/resources-avx2.s

  Log Message:
  -----------
  [X86] Synchronise scheduler classes of VPERM2F128/VBROADCASTF128/VEXTRACTF128/VINSERTF128 with I128 equivalents

znver1/znver2 has barely any difference in behaviour between the AVX1/2 variants of these instructions - it looks like it was a copy+paste mistake to miss the AVX2 integer domain instructions in the overrides.

Having said that the override numbers don't appear to match the numbers in the AMD 17h SoGs very well - for instance vperm2f128/vperm2i128 might be microcoded from the AMD sense of >3 uops, but it doesn't have a 100cy latency..... These will need to be further addressed.