[all-commits] [llvm/llvm-project] bc0fea: [SDAG] Allow scalable vectors in ComputeKnownBits

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bc0fea0d551b5182c541c43070830bfdcaa33ef2
      https://github.com/llvm/llvm-project/commit/bc0fea0d551b5182c541c43070830bfdcaa33ef2
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-11-18 (Fri, 18 Nov 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/AArch64/sve-intrinsics-index.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
    M llvm/test/CodeGen/AArch64/sve-umulo-sdnode.ll

  Log Message:
  -----------
  [SDAG] Allow scalable vectors in ComputeKnownBits

his is the SelectionDAG equivalent of D136470, and is thus an alternate patch to D128159.

The basic idea here is that we track a single lane for scalable vectors which corresponds to an unknown number of lanes at runtime. This is enough for us to perform lane wise reasoning on many arithmetic operations.

This patch also includes an implementation for SPLAT_VECTOR as without it, the lane wise reasoning has no base case. The original patch which inspired this (D128159), also included STEP_VECTOR. I plan to do that as a separate patch.

Differential Revision: https://reviews.llvm.org/D137140