[all-commits] [llvm/llvm-project] 116c89: DAG: Fix assert on load casted to vector with atta...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 116c894d7296f5995c7d280ead32e4bfc821a18f
      https://github.com/llvm/llvm-project/commit/116c894d7296f5995c7d280ead32e4bfc821a18f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-11-15 (Tue, 15 Nov 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    A llvm/test/CodeGen/AMDGPU/load-range-metadata-assert.ll

  Log Message:
  -----------
  DAG: Fix assert on load casted to vector with attached range metadata

AMDGPU legalizes i64 loads to loads of <2 x i32>, leaving the
i64 MMO with attached range metadata alone. The known bit width
was using the scalar element type, and asserting on a mismatch.


  Commit: 4787a48b96038ecebd86782ea72233ab12dfca03
      https://github.com/llvm/llvm-project/commit/4787a48b96038ecebd86782ea72233ab12dfca03
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-11-15 (Tue, 15 Nov 2022)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix shift tests using out of bounds offsets


Compare: https://github.com/llvm/llvm-project/compare/342642dc75e4...4787a48b9603