[all-commits] [llvm/llvm-project] 4a28b7: [X86] IceLakeModel - conversion instructions don't...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4a28b7ba9816fd7e8ecadfcaf6cfd1949f909dfd
      https://github.com/llvm/llvm-project/commit/4a28b7ba9816fd7e8ecadfcaf6cfd1949f909dfd
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-11-12 (Sat, 12 Nov 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86SchedIceLake.td
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512dq.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512dqvl.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512vl.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/IceLakeServer/resources-sse2.s

  Log Message:
  -----------
  [X86] IceLakeModel - conversion instructions don't use Port015

Fixes a lot of throughput mismatches - the more complicated conversion instructions use ICXPort5+ICXPort01, not ICXPort5+ICXPort015 (ICXPort015 is mainly used for basic Logic + blend ops)

Fixing this should allow us to remove a lot of unnecessary scheduler overrides from IceLakeModel

Confirmed by both Agner + uops.info