[all-commits] [llvm/llvm-project] 244ac4: [SystemZ] add test for mergeTruncStores miscompile...

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 244ac4fb1d7e96be9a0068751db42162772605a7
      https://github.com/llvm/llvm-project/commit/244ac4fb1d7e96be9a0068751db42162772605a7
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-11-10 (Thu, 10 Nov 2022)

  Changed paths:
    A llvm/test/CodeGen/SystemZ/merge-stores.ll

  Log Message:
  -----------
  [SystemZ] add test for mergeTruncStores miscompile; NFC

This is based on the example in issue #58883. I'm not sure
if the output currently shows the potential miscompile,
so we may want to adjust the test in a follow-up.


  Commit: b57819e130258b4cb30912dcf2f420af94d43808
      https://github.com/llvm/llvm-project/commit/b57819e130258b4cb30912dcf2f420af94d43808
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-11-10 (Thu, 10 Nov 2022)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
    M llvm/test/Transforms/VectorCombine/X86/load-widening.ll

  Log Message:
  -----------
  [VectorCombine] widen a load with subvector insert

This adapts/copies code from the existing fold that allows
widening of load scalar+insert. It can help in IR because
it removes a shuffle, and the backend can already narrow
loads if that is profitable in codegen.

We might be able to consolidate more of the logic, but
handling this basic pattern should be enough to make a small
difference on one of the motivating examples from issue #17113.
The final goal of combining loads on those patterns is not
solved though.

Differential Revision: https://reviews.llvm.org/D137341


Compare: https://github.com/llvm/llvm-project/compare/1ab3d30e62d1...b57819e13025