[all-commits] [llvm/llvm-project] 454758: [PowerPC] add a new subtarget feature fastMFLR

[Chen Zheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 454758ab69315e4e20f5cb0746535f7665dbcfe4
      https://github.com/llvm/llvm-project/commit/454758ab69315e4e20f5cb0746535f7665dbcfe4
  Author: Chen Zheng <czhengsz at cn.ibm.com>
  Date:   2022-11-10 (Thu, 10 Nov 2022)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPC.td
    M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
    M llvm/lib/Target/PowerPC/PPCSubtarget.h

  Log Message:
  -----------
  [PowerPC] add a new subtarget feature fastMFLR

Some PowerPC CPU may have slow MFLR instruction, so we need to
schedule the MFLR and its store in function prologue away to
hidden the long latency for slow MFLR instruction.

This patch adds a new feature fastMFLR and the new feature will
be used in https://reviews.llvm.org/D137423.

Reviewed By: RolandF

Differential Revision: https://reviews.llvm.org/D137612